Description:

The CMT2390F64 integrates a 32-bit ARM Cortex-M0 core and an ultra-low-power RF transceiver, and is a high-performance, ultra-low-power OOK,(G)FSK and 4(G)FSK RF transceiver MCU for wireless applications from 113 to 960 MHz. it is part of CMOSTEK's NextGenRFTM RF product line, which consists of a complete range of transmitters and receivers. The CMT2390F64's high level of integration simplifies the peripheral materials required in system design. Transmit power of up to +20 dB and sensitivity of -122 dBm optimize the link performance of the application. In addition, the CMT2390F64 supports 128-byte Tx/Rx FIFO, rich GPIO and interrupt configurations, Duty-Cycle operation mode, channel listening, high-precision RSSI, low-voltage detection, power-on reset, low-frequency clock output, fast frequency hopping, squelch output, etc., which makes the application design more flexible and realizes the differentiation of product design.

Features:

 ARM Cortex-M0 32-bit core, single-cycle hardware multiply instructions

 64 kB Flash On-chip Flash

- Supports encrypted storage and hardware ECC checksum

- 100,000 erase/write cycles, 10-year data retention

 8 kB on-chip SRAM, supports hardware parity check.

 Programming mode:

- Support SWD online debugging interface

- Support UART Bootloader

 23 general-purpose IOs available (4 of them are multiplexed with RF part SPI)

 Low power control mode:

- Stop Mode: RTC operation, maximum 8 KB Retention SRAM hold, CPU register hold, RTC operation, maximum 8 KB Retention SRAM hold.

Power Down Mode (PD): RTC operation, up to 8 KB Retention SRAM held, CPU registers held, all IOs held.

- Power Down Mode (PD): Supports 3 IO wakeups.

 Clock: up to 48 MHz

- LSE: 32.768 KH, external low speed crystal

- HSI: On-chip high speed RC OSC 8 MHz

- LSI: On-chip low-speed RC OSC 30 kHz

- Built-in high speed PLL

- Supports one clock output, which can be configured as system clock, HIS or PLL post.

Split Frequency Output

 reset

- Supports power-on/power-off/external pin reset.

- Supports programmable low voltage detection and reset;

- Watchdog reset

 Communication Interface

- 3 UART interfaces, maximum baud rate up to 3 Mbps, 2 of them are USART interfaces, supporting 1xISO7816 / 1xISO7816 / 1xISO7816

USART interface, supports 1xISO7816 / 1xIrDA / LIN, and one LPUART supports low power consumption.

LPUART supports low power consumption (up to 9600 bps) and can wake up in Stop mode.

Stop mode

- 2 SPI interfaces up to 18 MHz, 1 of which is multiplexed with I2S

- 2 I2C interfaces up to 1 MHz, master-slave mode available, slave mode supports dual address response

Supports dual address response in slave mode

RF Characteristics

 Operating Frequency: 113 - 960 MHz

 Modulation and demodulation: OOK, 2 (G)FSK, 4 (G)FSK

 Data Rate: 0.1 - 1000 kbps

 Sensitivity: 2 FSK, -122 dBm DR=2.4 kbps, 433.92 MHz

4 FSK, -88 dBm DR=1 Mbps, 433.92 MHz

OOK, -94 dBm DR= 300 kbps, 433.92 MHz

 Receive Current: 9.6 mA (DCDC) @ 433.92 MHz, FSK

 (RF section operating current only)

 Transmit Current: 30 mA @ 13 dBm, 433.92 MHz, FSK

 82 mA @ 20 dBm, 433.92 MHz, FSK

 (RF portion of operating current only)

 Supports pass-through and packet modes with configurable packet processor and 128-Byte FIFO.