Product Details

AD9363BBCZ wireless transceiver chip ADI original stock

Brand Name ADI
Place of Origin Albania
Model Number AD9363BBCZ
Type Drive IC
Package 1500
D/C 22+

Product Features

describe

AD9363 is a high-performance, highly integrated RF agile transceiver designed for 3G and 4G femtocell applications. Its programmability and broadband capabilities make it a widely used transceiver application. This device combines a RF front-end with a flexible mixed signal baseband band and an integrated frequency synthesizer, simplifying design by providing a configurable digital interface to the processor. AD9363 operates in the range of 325 MHz to 3.8 GHz, covering most authorized and unauthorized bands. Supports channel bandwidth from less than 200 kHz to 20 MHz.

These two independent direct conversion receivers have state-of-the-art noise patterns and linearity. Each Rx subsystem includes independent Automatic Gain Control (AGC), DC offset correction, orthogonal correction, and digital filtering, thereby eliminating the need for these functions in the digital baseband. The AD9363 also has a flexible manual gain mode. Each channel has two high dynamic range ADCs that digitize the received I and Q signals, and generate a 12 bit output signal at an appropriate sampling rate through a configurable decimation filter and a 128 tap finite impulse response (FIR) filter.

The transmitter adopts a direct conversion architecture, achieving high modulation accuracy and ultra-low noise. This transmitter design produces a first-class Tx EVM − 34dB, allowing external power amplifiers (PAs) to choose significant system margins. The onboard Tx power monitor can be used as a power detector to achieve high-precision Tx power measurement.

Fully integrated phase locked loops (PLLs) provide low power fraction N frequency synthesis for all receiving and transmitting channels. The channel isolation required by the FDD system is integrated into the design. All voltage controlled oscillators (VCOs) and loop filter components are integrated.

The core of AD9363 can be powered directly from a 1.3V regulator. The integrated circuit is controlled through a standard 4-wire serial port and four real-time input/output control pins. Including comprehensive power outage mode to reduce power consumption during normal use. AD9363 is packaged in a 10 mm package × 10mm, 144 ball chip scale encapsulated ball grid array (CSP_BGA).

FEATURES
Radio frequency (RF) 2 × 2 transceiver with integrated 12-bit
DACs and ADCs
Wide bandwidth: 325 MHz to 3.8 GHz
Supports time division duplex (TDD) and frequency division
duplex (FDD) operation
Tunable channel bandwidth (BW): up to 20 MHz
Receivers: 6 differential or 12 single-ended inputs
Superior receiver sensitivity with a noise figure: 3 dB
Receive (Rx) gain control
Real-time monitor and control signals for manual gain
Independent automatic gain control (AGC)
Dual transmitters: 4 differential outputs
Highly linear broadband transmitter
Transmit (Tx) error vector magnitude (EVM): −34 dB
Tx noise: ≤−157 dBm/Hz noise floor
Tx monitor: 66 dB dynamic range with 1 dB accuracy
Integrated fractional N synthesizers
2.4 Hz local oscillator (LO) step size
CMOS/LVDS digital interface
APPLICATIONS
3G enterprise femtocell base stations
4G femtocell base stations

Wireless video transmission


FUNCTIONAL BLOCK DIAGRAM





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