SAT-1AS  2M bit error tester is mainly used for measuring of the error rate of data communication and for the analysis of line fault and causes, and very suitable for the parameter measurement and routine maintenance testing of 2M system, N×64K communication channels..

For 2Mbit/s:

• Service-interrupted error testing
• Online error testing
• Framed and unframed signals generation and reception
• 2Mbit/s unframed error performance testing
• 2Mbit/s framed N×64kbit/s channel error testing
• Bit error, coding error, frame error, CRC error and E bit error testing
• Signal loss alarm, AIS alarm, framed remote alarm, multi-framed remote alarm, out-of-frame, and pattern loss alarm
• Frequency offset testing
• Voice channel signal level and frequency testing
• Pattern slip testing
• Straightforward signaling
• Audio frequency testing
• Voice monitoring
• Signal state display. Voice channel content display. Voice channel busy / idle indication
• Alarm and error histogram analysis
• Time slot content analysis, drop and insert signal on each time slot
• Framed content analysis
• G. 821/G. 826/M. 2100 error analysis
• Multi error and alarm inserting
• Three input modes (terminating, bridging and monitoring)

Two clock options (internal and picking-up);

Technical Index   2M Technical Index
(1) Signal input rate: 2048kbit/s±100ppmG.703 requirement±50PPM
(2) Signal coding: HDB3, AMI.
(3) Input jitter tolerance: Up to the requirement of Figure 10.1.
(4) Input balance response: Attenuation complies with the law of square root of frequency, and is within the range of 0 to 6dB at 1024 kHz.
(5) Input Impedance
(5.1) Unbalance terminating: 75Ω ,Balance terminating: 120Ω.Reflection loss >18dB within 50Hz3100kHz.

(5.2) Unbalance bridging: >750Ω,Balance bridging: >1200Ω
(5.3) Unbalance monitoring: 75Ω, 26dB gain,Balance monitoring: 120Ω, 26dB gain
Reflection loss >18dB within 50Hz3100kHz.
(6) Signal structure
(6.1) Non-frame structure
(6.2) Frame structure: PCM30, PCM31, PCM30CRC, PCM31CRC,Frame structure complies with the requirement of G. 704.
(7) Testing pattern: 2⁶-12⁹-12¹¹-12¹⁵-12²⁰-12²³-1, and artificial code
(8) Impedance of output interface:
(8.1) Non-balance 75Ω, up to G. 703
(8.2) Balance 120Ω, up to G. 703.
(9) External clock input
(9.1) Signal form: HDB3, NRZ
(9.2) Balance terminating resistance: 120ΩUnbalance terminating resistance: 75Ω.
Balance bridging resistance: >1200Ω Unbalance bridging resistance: >750Ω.
(10) Error code insertion: None, single, or ratio 10-1 ~ 10-7.
Co-directional 64k Technical Index
(1) Signal input rate: 64 kbit/s±100ppmG.703 requirement±100PPM
(2) Input impedance: Balance 120Ω, up to G.703
(3) Input jitter tolerance: Up to G.823.
(4) Impedance of output interface: Balance 120Ω, up to G.703
(5) Testing pattern:2⁶-12⁹-12¹¹-12¹⁵-12²⁰-12²³-1, and artificial code
Input Impedance
Other Parameters
Power supply
(1) Special power adapter;Input: AC220V 50Hz,Output: DC 9V 1A
(2) Internal rechargeable battery
4000mAh, 6V nickel-hydrogen rechargeable battery
Working time: 8 hours
Charging: 8 hours at power-off state, and 12 hours at power-on state.
Dimension and weight;L×W×H: 200×160×42mm;Weight: 950g
Ambient parameters
Operation temperature: 040
Storage Temperature: -30+70
Humidity: 5%90%, non-condensing