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Type:8402-319 8402-119

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Warranty: 365 days

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Local Reset Operation Local reset (LRST) is a subset of system reset (SRST). Local reset can be generated five ways: ❏ Expiration of the watchdog timer ❏ Pressing the front panel RESET switch (if the system controller function is disabled) ❏ By asserting a bit in the board control register in the GCSR ❏ By SYSRESET* ❏ By powerup reset. Note The GCSR allows a VMEbus master to reset the local bus. This feature is very dangerous and should be used with caution. The local reset feature is a partial system reset, not a complete system reset such as powerup reset or SYSRESET*. When the local bus reset signal is asserted, a local bus cycle may be aborted. The VMEchip2 is connected to both the local bus and the VMEbus and if the aborted cycle is bound for the VMEbus, erratic operation may result. Communications between the local processor and a VMEbus master should use interrupts or mailbox locations; reset should not be used in normal communications. Reset should be used only when the local processor is halted or the local bus is hung and reset is the last resort. Any VMEbus access to the MVME162 while it is in the reset state is ignored. If a global bus timer is enabled, a bus error is generated.

This chapter describes the MVME162 Embedded Controller on a block diagram level. The Functional Description provides an overview of the MVME162, followed by a detailed description of several blocks of MVME162 circuitry. Figure 4-1 shows a block diagram of the MVME162 main module. Figure 4-2 shows a block diagram of the parity DRAM mezzanine module. Descriptions of other MVME162 blocks, including programmable registers in the ASICs and peripheral chips, are given in the MVME162 Embedded Controller Programmer’s Reference Guide. Refer to it for the rest of the functional description of the MVME162. MVME162 Functional Description The MVME162 is a high-functionality VMEbus single board computer designed around the MC68040/MC68LC040 chip. It has 1MB, 4MB, or 8MB of DRAM, 512KB of SRAM, 1MB Flash memory, four MVIP IndustryPack interfaces, and two serial ports (one EIA-232-D DCE; one EIA-232-D or EIA530 DCE/DTE). Options include an SCSI mass storage interface, a LAN Ethernet transceiver interface, and a non-VMEbus version. Data Bus Structure The local data bus on the MVME162 is a 32-bit synchronous bus that is based on the MC68040 bus, and which supports burst transfers and snooping. The various local bus master and slave devices use the local bus to communicate. The local bus is arbitrated by priority type arbiter and the priority of the local bus masters from highest to lowest is: 82596CA LAN, NCR 53C710 SCSI, VMEbus, and MPU. Generally speaking, any master can access any slave; however, not all combinations pass the common sense test. Refer to the MVME162 Embedded Controller Programmer’s Reference Guide and to the user’s guide for each device to determine its port size, data bus connection, and any restrictions that apply when accessing the device