Features

• Single 2.5V - 3.6V or 2.7V - 3.6V Supply

• RapidS™

 Serial Interface: 66 MHz Maximum Clock Frequency

– SPI Compatible Modes 0 and 3

• User Configurable Page Size

– 512 Bytes per Page

– 528 Bytes per Page

• Page Program Operation

– Intelligent Programming Operation

– 4,096 Pages (512/528 Bytes/Page) Main Memory

• Flexible Erase Options

– Page Erase (512 Bytes) 

– Block Erase (4 Kbytes) 

– Sector Erase (128 Kbytes) 

– Chip Erase (16 Mbits)

• Two SRAM Data Buffers (512/528 Bytes) 

– Allows Receiving of Data while Reprogramming the Flash Array

• Continuous Read Capability through Entire Array

– Ideal for Code Shadowing Applications

• Low-power Dissipation

– 7 mA Active Read Current Typical

– 25 µA Standby Current Typical 

– 9 µA Deep Power Down Typical

• Hardware and Software Data Protection Features 

– Individual Sector

• Sector Lockdown for Secure Code and Data Storage

– Individual Sector

• Security: 128-byte Security Register

– 64-byte User Programmable Space

– Unique 64-byte Device Identifier

• JEDEC Standard Manufacturer and Device ID Read

• 100,000 Program/Erase Cycles Per Page Minimum

• Data Retention – 20 Years

• Industrial Temperature Range

• Green (Pb/Halide-free/RoHS Compliant) Packaging Options

1. Description

The AT45DB161D is a 2.5-volt or 2.7-volt, serial-interface sequential access Flash

memory ideally suited for a wide variety of digital voice-, image-, program code- and

data-storage applications. The AT45DB161D supports RapidS serial interface for

applications requiring very high speed operations. RapidS serial interface is SPI compatible for frequencies up to 66 MHz. Its 17,301,504 bits of memory are organized as

4,096 pages of 512 bytes or 528 bytes each. In addition to the main memory, the

AT45DB161D also contains two SRAM buffers of 512/528 bytes each. The buffers

allow the receiving of data while a page in the main Memory is being reprogrammed,

as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-write operation.

Unlike conventional Flash memories that are accessed randomly with multiple